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1994-10-05
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TITLE carry lookahead adder
DEFMOD cla( a[0:3], b[0:3], cin, s[0:3], cout )
CHIP cla Intel_arch
PIN a[0:3] ;* 4-bit addend
PIN b[0:3] ;* 4-bit addend
PIN cin ;* carry input
PIN s[0:3] ;* 4-bit sum
PIN cout ;* carry output
PIN g[0:3] ;* carry-generate bits
PIN p[0:3] ;* carry-propagate bits
PIN c[0:2] ;* internal carry bits
EQUATIONS
;* first bit
g0 = a0*b0
p0 = a0:+:b0
c0 = g0 + p0*cin
s0 = p0 :+: cin
;* second bit
g1 = a1*b1
p1 = a1:+:b1
c1 = g1 + p1*g0 + p1*p0*cin
s1 = p1 :+: c0
;* third bit
g2 = a2*b2
p2 = a2:+:b2
c2 = g2 + p2*g1 + p2*p1*g0 + p2*p1*p0*cin
s2 = p2 :+: c1
;* fourth bit
g3 = a3*b3
p3 = a3:+:b3
cout = g3 + p3*g2 + p3*p2*g1 + p3*p2*p1*g0 +
p3*p2*p1*p0*cin
s3 = p3 :+: c2
ENDMOD
CHIP test NFX780_84
PIN a[0:3] ; 4-bit addend
PIN b[0:3] ; 4-bit addend
PIN cin ; carry input
PIN s[0:3] ; 4-bit sum
PIN cout ; carry output
MODULE cla( a[0:3]=a[0:3], b[0:3]=b[0:3], cin=GND,
s[0:3]=s[0:3], cout=cout )
SIMULATION
VECTOR a := [a3,a2,a1,a0]
VECTOR b := [b3,b2,b1,b0]
VECTOR s := [cout,s3,s2,s1,s0]
TRACE_ON a b s
FOR i := 0 TO 15 DO
BEGIN
SETF a := i
FOR j := 0 TO 15 DO
BEGIN
SETF b := j
END
END